I am working as a CPU Design Engineer at Qualcomm. Before that, I have been a researcher at NTU where I was working on memory integrity algorithms for off-chip memories. My undergraduate research includes various aspects of Parallel computer architecture including Cache architecture, cache coherency for many-core systems, and network on-chip. You can check out my webpage https://rohanjuneja.github.io/. My expertise includes C++. Verilog, FPGA's, and Parallel Programming.
Technologies of Expertise
SystemVerilog, FPGA, C, C++, Python
Technologies of Interest
MPI, OpenMP, Habanero C